Validation Engineer

Our Role We are seeking a highly skilled and experienced Validation Engineer to join our team with expertise in either Mixed Signal IP validation or Top-Level System Validation of our electro-optical sensors. The role involves validating analog and mixed signal IP designs and ensuring their functionality and/or system performance meet specified requirements. Responsibilities Develop test plans and validation strategies for IP blocks and subsystems.

Collaborate with design and verification teams to ensure successful validation of IPs. Conduct in-depth testing, simulation, and analysis of IP designs to verify performance. Identify performance issues, debug problems, and report findings to the design team.

Develop automation scripts and tools to enhance validation efficiency and test coverage. Work closely with cross-functional teams to drive successful tape-out of analog IP blocks. Qualifications and Key Technical Skills Bachelor's or Master's degree in Electrical Engineering or a related field.

Minimum of 2-5 years of experience in mixed signal IP validation. Strong expertise in circuit design and validation methodologies. Advanced knowledge of laboratory instruments and equipment.

Hands‑on experience with industrial-grade simulation tools (e.g., LTSpice, eDesignSuite). Proficiency in scripting languages (e.g., Python, Perl) for automation tasks. Skilled in data analysis and presentation tools such as JMP, MATLAB, MS Excel, CSV.

Excellent analytical and problem-solving skills. Strong communication and teamwork abilities. High level of cooperation and autonomy.

Equal Employment Opportunity and Diversity Statement At ST, we endeavor to foster a diverse and inclusive workplace and do not tolerate discrimination. We aim to recruit and retain a workforce that reflects our societies, provide equity in career development and opportunities, and encourage all qualified candidates to apply. #J-18808-Ljbffr