Senior SerDes Engineer at Synopsys

Elevate high-speed design with Synopsys as a Senior SerDes Systems Engineer. Your expertise in analog and digital communications will drive innovation in PCIe and Ethernet solutions. As a Senior Engineer, you will take the lead in creating high-performance SerDes system models at Synopsys.

This role engages your analytical skills to diagnose complex issues and propose advanced algorithms. Collaboration across engineering disciplines is essential, as well as a deep understanding of high-speed communication protocols. Key Responsibilities: • Design and maintain advanced SerDes system models • Conduct simulations to validate design performance • Propose calibration algorithms for transceiver optimization • Ensure reliability through performance correlation • Serve as a technical resource for customer support Requirements: • M.Sc. or Ph.D. in Electrical or Computer Engineering • Experience with MATLAB/Simulink modeling • Strong background in high-speed analog circuit design • Understanding of link budgets and protocols • Proficiency in lab testing for serial links Make a significant impact in delivering high-speed, reliable communication solutions at Synopsys. #J-18808-Ljbffr