Layout Engineer

Layout in advanced CMOS technologies including floorplan, placement, routing, DRC, LVS etc. Expertise on 2nm ,3nm, 5nm,7nm,14nm etc. technology nodes on various analog mixed signal blocks such as HBM, PLL, Band gap, LDO, ADC, DAC, SERDES, IO etc. Should be well versed with tools such as Virtuoso/ XL/ EXL, IC12.1, and Calibre etc.

Requires excellent teamwork, good communication and strong problem-solving skills. Standard analog layout techniques and good understanding of physical, electrical aspects of layout. Good understanding of reliability physics including EM, ESD, crosstalk, shielding, Latchup and deep sub-micron challenges.